? semiconductor components industries, llc, 2012 may, 2012 ? rev. 10 1 publication order number: 2n7002k/d 2n7002k, 2v7002k small signal mosfet 60 v, 380 ma, single, n ? channel, sot ? 23 features ? esd protected ? low r ds(on) ? surface mount package ? 2v prefix for automotive and other applications requiring unique site and control change requirements; aec ? q101 qualified and ppap capable ? these devices are pb ? free, halogen free/bfr free and are rohs compliant applications ? low side load switch ? level shift circuits ? dc ? dc converter ? portable applications i.e. dsc, pda, cell phone, etc. maximum ratings (t j = 25 c unless otherwise stated) rating symbol value unit drain ? to ? source voltage v dss 60 v gate ? to ? source voltage v gs 20 v drain current (note 1) steady state 1 sq in pad t a = 25 c t a = 85 c i d 380 270 ma drain current (note 2) steady state minimum pad t a = 25 c t a = 85 c i d 320 230 ma power dissipation steady state 1 sq in pad steady state minimum pad p d 420 300 mw pulsed drain current (t p = 10 s) i dm 1.5 a operating junction and storage temperature range t j , t stg ? 55 to +150 c source current (body diode) i s 300 ma lead temperature for soldering purposes (1/8 from case for 10 s) t l 260 c gate ? source esd rating (hbm, method 3015) esd 2000 v stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. 1. surface ? mounted on fr4 board using 1 sq in pad size with 1 oz cu. 2. surface ? mounted on fr4 board using 0.08 sq in pad size with 1 oz cu. device package shipping ? ordering information 2n7002kt1g 3000 / tape & reel simplified schematic sot ? 23 case 318 style 21 704 m marking diagram & pin assignment 3 2 1 drain gate 2 1 3 source http://onsemi.com sot ? 23 (pb ? free) 60 v 1.6 @ 10 v r ds(on) max 380 ma i d max v (br)dss ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our t ape and reel packaging specifications brochure, brd8011/d. 2.5 @ 4.5 v gate source drain 3 2 1 (top view) 704 = specific device code* m = date code* = pb ? free package 2V7002KT1G 3000 / tape & reel sot ? 23 (pb ? free) *specific device code, date code or overbar orientation and/or location may vary depend- ing upon manufacturing location. this is a representation only and actual devices may not match this drawing exactly. (note: microdot may be in either location)
2n7002k, 2v7002k http://onsemi.com 2 thermal characteristics characteristic symbol max unit junction ? to ? ambient ? steady state (note 3) r ja 300 c/w junction ? to ? ambient ? t 5 s (note 3) 92 junction ? to ? ambient ? steady state (note 4) 417 junction ? to ? ambient ? t 5 s (note 4) 154 3. surface ? mounted on fr4 board using 1 sq in pad size with 1 oz cu. 4. surface ? mounted on fr4 board using 0.08 sq in pad size with 1 oz cu. electrical characteristics (t j = 25 c unless otherwise specified) parameter symbol test condition min typ max unit off characteristics drain ? to ? source breakdown voltage v (br)dss v gs = 0 v, i d = 250 a 60 v drain ? to ? source breakdown voltage temperature coefficient v (br)dss /t j 71 mv/ c zero gate voltage drain current i dss v gs = 0 v, v ds = 60 v t j = 25 c 1 a t j = 125 c 500 v gs = 0 v, v ds = 50 v t j = 25 c 100 na gate ? to ? source leakage current i gss v ds = 0 v, v gs = 20 v 10 a v ds = 0 v, v gs = 10 v 450 na v ds = 0 v, v gs = 5.0 v 150 na on characteristics (note 5) gate threshold voltage v gs(th) v gs = v ds , i d = 250 a 1.0 2.3 v negative threshold temperature coefficient v gs(th) /t j 4.0 mv/ c drain ? to ? source on resistance r ds(on) v gs = 10 v, i d = 500 ma 1.19 1.6 v gs = 4.5 v, i d = 200 ma 1.33 2.5 forward transconductance g fs v ds = 5 v, i d = 200 ma 530 ms charges and capacitances input capacitance c iss v gs = 0 v, f = 1 mhz, v ds = 20 v 24.5 pf output capacitance c oss 4.2 reverse transfer capacitance c rss 2.2 total gate charge q g(tot) v gs = 4.5 v, v ds = 10 v; i d = 200 ma 0.7 nc threshold gate charge q g(th) 0.1 gate ? to ? source charge q gs 0.3 gate ? to ? drain charge q gd 0.1 switching characteristics, v gs = v (note 6) turn ? on delay time t d(on) v gs = 10 v, v dd = 25 v, i d = 500 ma, r g = 25 12.2 ns rise time t r 9.0 turn ? off delay time t d(off) 55.8 fall time t f 29 drain ? source diode characteristics forward diode voltage v sd v gs = 0 v, i s = 200 ma t j = 25 c 0.8 1.2 v t j = 85 c 0.7 5. pulse test: pulse width 300 s, duty cycle 2% 6. switching characteristics are independent of operating junction temperatures
2n7002k, 2v7002k http://onsemi.com 3 typical characteristics 5.0 v figure 1. on ? region characteristics figure 2. transfer characteristics v ds , drain ? to ? source voltage (v) v gs , gate ? to ? source voltage (v) 6 4 2 0 0 0.4 0.8 1.2 1.6 6 4 2 0 0 0.4 0.8 1.2 figure 3. on ? resistance vs. drain current and temperature figure 4. on ? resistance vs. drain current and temperature i d , drain current (a) 1.2 1.0 0.8 0.6 0.4 0.2 0 0 0.4 0.8 1.2 1.6 2.0 3.2 figure 5. on ? resistance vs. gate ? to ? source voltage figure 6. on ? resistance variation with temperature v gs , gate ? to ? source voltage (v) t j , junction temperature ( c) 10 8 6 4 2 0.4 0.8 1.6 2.4 125 100 75 50 25 0 ? 25 ? 50 0.6 1.0 1.4 1.8 2.2 i d , drain current (a) i d , drain current (a) r ds(on) , drain ? to ? source resistance ( ) r ds(on) , drain ? to ? source resistance ( ) r ds(on) , drain ? to ? source resistance (normalized) v gs = 10 v 7.0 v 8.0 v 9.0 v 4.5 v 4.0 v 6.0 v 3.5 v 3.0 v 2.5 v t j = ? 55 c t j = 125 c t j = 25 c t j = ? 55 c t j = 125 c t j = 25 c t j = 85 c v gs = 4.5 v i d , drain current (a) 1.2 1.0 0.8 0.6 0.4 0.2 0 0 0.8 1.6 2.4 3.2 r ds(on) , drain ? to ? source resistance ( ) t j = ? 55 c t j = 125 c t j = 25 c t j = 85 c v gs = 10 v i d = 500 ma i d = 200 ma 150 i d = 0.2 a v gs = 4.5 v v gs = 10 v 1.2 2.0 2.4 2.8 0.4 1.2 2.0 2.8
2n7002k, 2v7002k http://onsemi.com 4 typical characteristics figure 7. capacitance variation figure 8. gate ? to ? source and drain ? to ? source voltage vs. total charge qg, total gate charge (nc) 0.8 0.6 0.4 0.2 0 0 1 2 3 4 5 figure 9. diode forward voltage vs. current v sd , source ? to ? drain voltage (v) 1.2 1.0 0.8 0.6 0.4 0.01 1 10 v gs , gate ? to ? source voltage (v) i s , source current (a) t j = 25 c i d = 0.2 a 20 16 12 8 4 0 0 10 20 30 c, capacitance (pf) c iss c oss c rss t j = 25 c v gs = 0 v gate ? to ? source or drain ? to ? source voltage (v) t j = 25 c t j = 85 c v gs = 0 v 0.1 figure 10. threshold voltage with temperature t j , junction temperature ( c) 125 100 75 50 25 0 ? 25 ? 50 0.5 0.7 0.9 1.1 1.3 v gs(th) , threshold voltage (v) 150 i d = 250 a 0.6 0.8 1.0 1.2
2n7002k, 2v7002k http://onsemi.com 5 typical characteristics 0.1 1 10 100 0.000001 0.00001 0.0001 0.001 0.01 0.1 1000 figure 11. thermal response ? 1 sq in pad t, pulse time (s) r jc(t) ( c/w) effective transient thermal resistance 0.02 0.2 0.01 0.05 duty cycle = 0.5 single pulse 0.1 1 10 100 1000 0.1 1 10 100 0.000001 0.00001 0.0001 0.001 0.01 0.1 1000 figure 12. thermal response ? minimum pad t, pulse time (s) r jc(t) ( c/w) effective transient thermal resistance 0.02 0.2 0.01 0.05 duty cycle = 0.5 single pulse 0.1 1 10 100 1000
2n7002k, 2v7002k http://onsemi.com 6 package dimensions sot ? 23 (to ? 236) case 318 ? 08 issue ap style 21: pin 1. gate 2. source 3. drain mm inches scale 10:1 0.8 0.031 0.9 0.035 0.95 0.037 0.95 0.037 2.0 0.079 soldering footprint d a1 3 12 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. maximum lead thickness includes lead finish thickness. minimum lead thickness is the minimum thickness of base material. 4. dimensions d and e do not include mold flash, protrusions, or gate burrs. view c l 0.25 l1 e e e b a see view c dim a min nom max min millimeters 0.89 1.00 1.11 0.035 inches a1 0.01 0.06 0.10 0.001 b 0.37 0.44 0.50 0.015 c 0.09 0.13 0.18 0.003 d 2.80 2.90 3.04 0.110 e 1.20 1.30 1.40 0.047 e 1.78 1.90 2.04 0.070 l 0.10 0.20 0.30 0.004 0.040 0.044 0.002 0.004 0.018 0.020 0.005 0.007 0.114 0.120 0.051 0.055 0.075 0.081 0.008 0.012 nom max l1 h 2.10 2.40 2.64 0.083 0.094 0.104 h e 0.35 0.54 0.69 0.014 0.021 0.029 c 0 ??? 10 0 ??? 10 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?t ypicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license un der its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended f or surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in a ny manner. 2n7002k/d publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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